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[Other resource] PCI总线仲裁参考设计，Quicklogic提供

Description: PCI总线仲裁参考设计，Quicklogic提供的verilog代码-PCI bus arbitration reference design, pioneered the Verilog code
Platform: | Size: 3480 | Author: 陈旭 | Hits:

[Other resource] pci

Description: pci接口的verilog原代码,定义了pci接口所需要的全部引脚
Platform: | Size: 4260 | Author: david | Hits:

[Other resource] PCI

Description: PCI设计指南The Xilinx LogiCORE PCI interface is a fully verified, pre-implemented PCI Bus interface. This interface is available in 32-bit and 64- bit versions, with support for multiple Xilinx FPGA device families. It is designed to support both Verilog-HDL and VHDL. The design examples in this book are provided in Verilog.
Platform: | Size: 899078 | Author: lee | Hits:

[SourceCode] pci设计（verilog）

Description: pci设计verilog，可参考
Platform: | Size: 108449 | Author: guolh_bj | Hits:

[Graph Drawing] Scan_T

Description: 自己写的一个对PC并口进行的操作程序，以及对数据的读入后，进行的波形显示。（需要硬件支持 D24/56 PCI i/o接口板）-himself wrote a parallel port on PC operating procedures, and to read into the data, the waveform shows. (D24/56 need hardware support PCI i/o interface board)
Platform: | Size: 92160 | Author: zhouwj | Hits:

[Other] PCIExpressSpecification

Description: PCI Express Specification
Platform: | Size: 550912 | Author: khj | Hits:

[VHDL-FPGA-Verilog] pci_express_crc

Description: PCI express CRC rtl core for Fpga/asic Designer
Platform: | Size: 202752 | Author: 李晓媛 | Hits:

[Embeded-SCM Develop] pci_uart_parity

Description: uart pci 等verilog hdl 代码-uart pci such as verilog hdl code
Platform: | Size: 7168 | Author: skdk | Hits:

[File Format] asic_design

Description: 华为,大规模逻辑设计指导书,规格详细，包括：VHDL编写规范，Verilog编写规范，asic设计方法，同步电路设计规则，vhdl电路设计，代码可重用设计，-Huawei, a large-scale logic design guide books, detailed specifications, including: VHDL specification preparation, Verilog specification preparation, asic design, synchronous circuit design rules, vhdl circuit design, reusable code design,
Platform: | Size: 2041856 | Author: feng jee | Hits:

[VHDL-FPGA-Verilog] multi16

Description: verilog 写的两种方式的乘法器 不错!-Verilog write the multiplier in two ways good!
Platform: | Size: 7168 | Author: rayax | Hits:

[VHDL-FPGA-Verilog] fpgaPCI

Description: fpga开发pci的verilog，不可多得的源代码。-FPGA development pci of verilog, rare source code.
Platform: | Size: 1726464 | Author: 王军 | Hits:

[VHDL-FPGA-Verilog] arbiter

Description: 一个用verilog编写的总线仲裁程序。多个设备共享总线，不同设备的优先级是变化的，保证每个设备都有公平的使用总线的机会。-Verilog prepared a bus with arbitration proceedings. Multiple devices share the bus, the priority of different devices is changing to ensure that each device will have a fair opportunity to use the bus.
Platform: | Size: 3072 | Author: bao rui | Hits:

[VHDL-FPGA-Verilog] pci_t

Description: verilog开发的PCI target模块，能完成配置空间的读写以及单次的memory读写，原创。-Verilog development of PCI target module, to complete the reading and writing, as well as the configuration space of a single memory read and write, originality. Ha ha
Platform: | Size: 10240 | Author: 齐培红 | Hits:

[VHDL-FPGA-Verilog] PCI_arbi

Description: PCI arbi verilog source code
Platform: | Size: 3072 | Author: bulbul1225 | Hits:

[Embeded-SCM Develop] pci.tar

Description: verilog编写的PCI总线，提供了Wishbone bus和PCI local bus之间的接口，内由两个独立的模块组成，分别完成WB BUS和PCI bus之间的传输-The PCI IP core (PCI bridge) provides an interface between the WISHBONE SoC bus and the PCI local bus. It consists of two independent units, one handling transactions originating on the PCI bus, the other one handling transactions originating on the WISHBONE bus.
Platform: | Size: 13253632 | Author: yemao | Hits:

[VHDL-FPGA-Verilog] FPGA_PCI_DATA

Description: 一个基于FPGA的PCI数据发送程序，实现从计算机通过PCI9054向FPGA发送数据功能。开发语言verilog,开发环境quartus-FPGA-based PCI data distribution process, from the computer through the PCI9054 functions to send data to the FPGA. The development of language verilog, development environment quartusII
Platform: | Size: 236544 | Author: 李国扬 | Hits:

[VHDL-FPGA-Verilog] LIP4301CORE_PCI

Description: PCI Verilog source code
Platform: | Size: 167936 | Author: jc | Hits:

[VHDL-FPGA-Verilog] pci32lite_oc

Description: PCI 32bit Slave Verilog 代码-PCI 32bit Slave Verilog code
Platform: | Size: 18432 | Author: chen | Hits:

[VHDL-FPGA-Verilog] PCI-dio

Description: 基于PCI的DIO接口程序，包括verilog源程序、驱动源程序以及寄存器说明文件-PCI-DIO-based interface program, including the verilog source code, driver source code and documentation register
Platform: | Size: 2309120 | Author: zifeng | Hits:

[VHDL-FPGA-Verilog] PCI_Verilog

Description: Verilog 实现 PCI 转 LocalBus。已在Quartus 9.0下编译并且上PCBA验证通过。-Verilog achieve PCI to LocalBus. Has been compiled in Quartus 9.0 and verified by the PCBA.
Platform: | Size: 16384 | Author: xianwy | Hits:
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